Timeline for How does integer comparison work internally?
Current License: CC BY-SA 3.0
20 events
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| Aug 8, 2017 at 21:55 | comment | added | John Wu | Thank you all for your comments. I have amended the post to correct the usage of half-adder and to mention CMOS. | |
| Aug 8, 2017 at 21:54 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 6, 2017 at 2:20 | comment | added | Niek | @Ruslan Thank you for reminding me! I have done so now. | |
| Aug 6, 2017 at 2:19 | vote | accept | Niek | ||
| Aug 5, 2017 at 18:08 | comment | added | Voo | Your definitions of half- and full-adder are incorrect. A half adder takes two 1-bit inputs and returns the sum and carry. A full adder takes an additional carry-in input but is still only single bit. There are many ways to create a N-bit adder, the simplest being a ripple-carry adder which is just a chain of N full adders. In practice for larger Ns this has a pretty bad delay so more complex designs are used in modern CPU designs. | |
| Aug 5, 2017 at 16:25 | comment | added | Hagen von Eitzen |
Nitpicking: I suppose CMP would be used, not SUB - but then again that is more or less a "SUB wher the result is ignored and only the flags are set"
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| Aug 5, 2017 at 14:43 | comment | added | KutuluMike | @JackAidley that's what this part means: "In other words, 2 is subtracted from 3 in one instruction, and the next instruction checks to see if it overflowed." | |
| Aug 5, 2017 at 12:43 | comment | added | Jack Aidley | This is great, however, IMO you have not actually answered the question since your explanation does not include how the compare works. | |
| Aug 5, 2017 at 11:41 | comment | added | Jules | CMOS would definitely be a better reference than TTL, as @whatsisname suggests, because not only is it more accurate to what goes on in modern processors, it's also conceptually much simpler. | |
| Aug 5, 2017 at 10:39 | comment | added | Ruslan | @Niek you may want to accept the answer as well, not only verbally thank. | |
| Aug 5, 2017 at 8:24 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 7:17 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 7:10 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 7:02 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 5:06 | comment | added | whatsisname | FWIW, referencing to TTL may be confusing as virtually no modern processors use TTL signalling, most using CMOS FETs and lower voltages instead of 5v BJTs. | |
| Aug 5, 2017 at 2:56 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 2:48 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 2:42 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 2:37 | history | edited | John Wu | CC BY-SA 3.0 |
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| Aug 5, 2017 at 2:30 | history | answered | John Wu | CC BY-SA 3.0 |