Timeline for Why is multithreading not used everywhere?
Current License: CC BY-SA 4.0
14 events
when toggle format | what | by | license | comment | |
---|---|---|---|---|---|
Jul 19, 2020 at 4:23 | comment | added | Loren Pechtel | A multi-core CPU actually provides a benefit even if you get no more instructions executed. In reality you have multiple things running on your machine, if you have 10 tasks running on 10 cores rather than being sliced onto a single core you have a lot less time wasted on task switches. | |
Jul 13, 2020 at 6:08 | history | edited | Kilian Foth | CC BY-SA 4.0 |
deleted 5 characters in body
|
Jul 11, 2020 at 23:12 | comment | added | Peter Cordes | @candied_orange: Right, smaller transistors means smaller capacitance, less charge to dump to ground every time a 1 switches to a 0. But it also concentrates the power into a smaller area, making cooling a problem: sometime around the Pentium 4 era (like 130nm feature size?) shrinking transistors stopped letting us boost clock speeds, aka CPU design hit the "power wall". (This is why the P4 design philosophy of clocking really high faceplanted.) Modern Microprocessors A 90-Minute Guide! explains this nicely. | |
Jul 11, 2020 at 23:10 | comment | added | Peter Cordes | @Mark: Indeed, the speed of electric signals in a medium is actually some fraction of the speed of light. My first comment was an oversimplification. Also limited by transmission-line effects (parasitic capacitance and inductance). Speed of light vs speed of electricity | |
Jul 11, 2020 at 23:06 | comment | added | Peter Cordes | @JohannesPille: Indeed, physical distance is one of the reasons why making a larger L1d cache would be a problem- it would hurt its latency. Low latency L1d cache is more important than somewhat larger, especially when you can build a reasonably fast per-core-private L2 cache. The other major reason being power if you build an L1d cache for speed (fetch data+tags in parallel, and multi-ported, maybe unaligned accesses). (And the VIPT = PIPT trick to gain speed without aliasing only works with small and/or highly associative caches, for a given page size.) | |
Jul 11, 2020 at 21:20 | comment | added | MSalters | Physicist here, Mark H. is right. Relativity theory (Special and General) deals with the slowing of time and the curvature of space. The finite speed of light can be dealt with in Maxwell's classical equations. PN junctions are very much Quantum Mechanics, that's the chief non-classical physics on any chip. | |
Jul 11, 2020 at 21:03 | comment | added | Mark | Isn't it more quantum effects than relativity? You can't really scale down to single atom connections and separation, because you get quantum effects. I think signals don't currently move at light speed, which is why they're working on making light-based chips. (Light's pretty big compared to atoms though) | |
Jul 11, 2020 at 20:20 | comment | added | Johannes Pille | Valid points, @PeterCordes, however the most relevant bottleneck isn't the distance inside the processor - the by far (!) most significant bottleneck is the simple truth that main memory is slow as farts and L1 cache a very scarce resource... | |
Jul 11, 2020 at 20:07 | comment | added | candied_orange | @PeterCordes the way CPU cores fight the speed of light problem is to get smaller. Also fights the heat problem. The problem with that though is atoms are only so small. | |
Jul 11, 2020 at 19:44 | comment | added | Peter Cordes | The other main way of making CPUs faster at running a single thread is raising IPC, but that's limited by the available instruction-level parallelism in most real-world code, and the difficulty of exploiting it in real-world code (branch-prediction and cache misses especially). Making a core wider costs quadratic power, approximately, and has diminishing returns (sub-linear speedup, which is why Intel has kept their CPUs 4-wide from Core 2 to Skylake, finally widening to 5-wide alloc/rename for Ice Lake). Why not make one big CPU core? | |
Jul 11, 2020 at 19:40 | comment | added | Peter Cordes | @MarkH: Speed of light = speed of electricity = finite, meaning that propagation delay over long wires within one core are a problem for high clock speeds, as well as for power. | |
Jul 11, 2020 at 19:37 | comment | added | Mark H | Relativistic effects? | |
Jul 11, 2020 at 10:41 | vote | accept | Martian | ||
Jul 11, 2020 at 9:59 | history | answered | Kilian Foth | CC BY-SA 4.0 |