Reading about ARM architecture I found many similarities to PDP-11 architecture which did not exist between ARM and x86.

For example,

  • General-purpose registers named Rx compared to AX, BX,... for x86

  • Uniform registry file (all registers permit all kinds of operations)

  • Similar names for program counter (PC both on ARM and PDP), compared to IP in x86.

  • Inclusion of Program Counter into general registry file (in PDP it also can be refereed to as R7, in ARM - as R15, both the last registers in the file).

  • Inclusion of I/O ports into general address space (i.e. addressing them as memory) compared to a separated I/O address space in x85 (and special I/O instructions).

  • Using 3-letter basic assembler mnemonics (TST compared to "test" in x86) with suffixes specifying data type (such as "B" for byte, compared to constructions like "byte ptr" in x86)

  • Using BNE, BEQ and other B condition instructions for branches.

  • Use of "#" symbol before a number to specify an immediate value (compared to "." in x86)

etc. So is there any historical relationship between ARM and PDP that makes them closer to each other than to x86?

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  • Eh, most of these differences seem cosmetic. The IP in x86 was, in fact, called the PC register in the 8088, and most of the opcodes were 3 letters long, (BNE was JNZ in the 8088) so it appears that most of the differences you describe happened when Intel went to a 16 bit architecture. – Robert Harvey Apr 2 '13 at 23:23
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    All of these characteristics were common of many CPUs except for the Intel microprocessor family. Given that Acorn was founded in the 1970s, it's not surprising that the ARM would resemble the common model of the time. – Ross Patterson Apr 2 '13 at 23:24
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    I've never done assembly on ARM or PDP, but pretty much everything you mention in your question is the same as the architectures I am familiar with, PowerPC and Motorola's 680x0. I suspect that the reality is "Intel is just different" rather than "ARM and PDP-11 are particularly similar". – Carson63000 Apr 3 '13 at 3:03
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    Its more a question of x86 being wierd, and PDP/11 being conventional, similar register arrangements and instruction semantics occur in many machines from IBMs 360, through Motolrola 6800 and beyond. Backward compatibility to the very constrained 8080 chip is responsible for the single purpose registers. Current Itel chips are in effect emulating a 486 instruction set, and internally have many more registers which are not constrained to a single function. – James Anderson Apr 3 '13 at 6:22
  • The most detailed account I've come across so far on this is an interview with Steve Furber (queue.acm.org/detail.cfm?id=1716385) in which he explains that many of the choices arose mainly out of a lack of resources to do anything more complex. – James Youngman Feb 6 '16 at 20:58

I don't know how much the designers of the ARM architecture took inspiration from the PDP-11. They probably knew the PDP-11 architecture well as it was one of the major CPUs of the 1970s. However, it's more the x86 which is different from the other two.

ARM is a RISC architecture: its instructions tend to follow a few model and to do just one thing. Compare with MIPS which is pretty much textbook RISC. Both PDP-11 and x86 are CISC, with many instructions combining several operations (e.g. a load and a store, or a memory access plus an arithmetic operation). In some aspects, the PDP-11 was a forerunner of RISC, in particular with its fairly orthogonal instruction set (e.g. the main registers, including the program counter, are general-purpose registers usable with any instruction).

Naming the general-purpose registers Rx is pretty natural. X86 doesn't do this because almost all its registers have a special purpose (even ax through dx have some specificities, e.g. multiplication that can only be ax*dx).

Using special instructions or a memory mapping for I/O is related to how the I/O unit connects to the CPU. If I/O goes through the same bus as RAM, it's natural to use a memory mapping and let the memory bus controller dispatch the signals. If I/O goes on a separate bus, it's natural to have separate instructions, with the CPU doing the dispatching right off the bat.

B for branching isn't specific to PDP and ARM. There are two x86 assembly syntaxes: AT&T syntax and Intel syntax. mov byte ptr [ax], bx is Intel syntax; the corresponding AT&T syntax is movl (%bx), %ax. The AT&T syntax is closer to major assembly languages used today.

  • In ARM load and store can be done by MOV operation as well (similar to x86 and PDP). Arithmetic operations are also possible with memory (although the other operand should be registry, a requirement shared with x86) – Anixx Apr 3 '13 at 0:19

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