From Tanenbaum's Structured Computer Organization,

Most instructions can be divided into one of two categories: register-memory or register-register.

Register-memory instructions allow memory words to be fetched into registers, where, for example, they can be used as ALU inputs in subsequent instructions. (‘‘Words’’ are the units of data moved between memory and registers. A word might be an integer. We will discuss memory organization later in this chapter.) Other register-memory instructions allow registers to be stored back into memory.

A typical register-register instruction fetches two operands from the registers, brings them to the ALU input registers, performs some operation on them (such as addition or Boolean AND), and stores the result back in one of the registers. The process of running two operands through the ALU and storing the result is called the data path cycle and is the heart of most CPUs. To a considerable extent, it defines what the machine can do. Modern computers have multiple ALUs operating in parallel and specialized for different functions. The faster the data path cycle is, the faster the machine runs.

Are there memory-memory instructions?

Or is a memory-memory "operation" implemented as two register-memory instructions (one for read and the other for write)? Isn't this inefficient than moving data directly between two places in the same memory without going via a register?

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    Older processors, most notably the DEC PDP-11 and TI 990, provided memory-to-memory instructions. Current-gen processors are almost all load/store machines, that do not do memory-to-memory. – John R. Strohm Feb 23 '15 at 19:27

Lots of machine architectures have memory-memory instructions.

The IBM System/360 and its successors have a whole set of instructions that operate on two locations in memory (the Storage Storage (SS) group). "Move Character" (MVC) instruction copies up to 256 bytes from one memory location to another, and even has a clear definition for when the source and destination ranges overlap. Similarly there are Compare Logical Character (CLC) (which does a string-comparison), OR Character (OC), AND Character (NC), and XOR Character (XC), which are bitwise logical operators, etc. The also have a set of decimal arithmetic instructions, which only operate on memory - there aren't any registers for decimal math.

Then there are the memory-immediate instructions, which have one operand in memory and the other in the instruction itself. The DEC PDP-10 had Add One to Storage (AOS) and Subtract One from Storage (SOS). The IBM S/360 family had a wide range of Storage Immediate (SI) instructions, in which one operand was a memory location and the other was an 8-bit quantity in the instruction.

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    Don't ignore the x86: rep movs for memory-copy... even if the cpu does not offload the work. – Deduplicator Feb 21 '15 at 16:04
  • The PDP-11 instruction set allowed memory-to-memory instructions to be constructed. – John R. Strohm Feb 23 '15 at 19:25
  • In IBM System 360/System Z all the decimal instructions are memory based. Primarily because the decimal types would not easily fit into a register. – James Anderson Feb 24 '15 at 2:30
  • @JamesAnderson System/360 could have had decimal registers, the designers just chose not to. There are examples of machines with decimal registers, just not many. Most predate the now-near-universal use of two's complement binary for fixed-point and integer arithmetic. And when Amdahl, Blaauw, and Evans were designing the System/360, decimal computer arithmetic was still a recent memory. – Ross Patterson Feb 25 '15 at 10:30
  • @Ross Patterson -- its not just a problem of fitting the data in. Its that fixed decimal ops are quite complex the overflow handling and amount of complex shifting is not easily handled in afixed width register. Incidentally the 360 had all those decimal instructions because Amdahl et al. analysed the expected loads and found that most commercial programs at that time used up thier cpus doing "convert to binary" and "convert to decimal" instructions -- direct decimal was an optimisation. – James Anderson Feb 25 '15 at 11:48

Memory chips do not have a mechanism for transferring data directly from one memory location to another. Hence, the processor must read the data from memory, and then write it to the new location.

In computer systems having DMA controllers, it is possible to perform memory transfers without involving the CPU. There are potential complications, such as cache coherency.

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  • Just as a note, DMA controllers generally just do repeated reads then writes just like the processor would be doing. – caveman Feb 21 '15 at 7:38
  • In fact, some DMA controllers are even programmable with small instruction sets, and can perform limited amounts of computation. – nneonneo Feb 21 '15 at 23:38

The Motorola 68000 ("68K") architecture had an orthogonal instruction set, and both operands could specify absolute memory addresses. You could also do things like directly incremement / decrement the value at a specific memory location, whereas with a more RISC-like architecture you'd still be required to load memory to register, increment register, write (store) register back to memory.

The ColdFire architecture is the heir/successor to the 68K, and I think they might have trimmed away some of the more exotic instructions and addressing modes.

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