Why are most computers byte addressable instead of bit addressable?

By B/b addressable I mean that processor can operate on level of single B/b.

  • Bit addressable advantages:

Booleans have size of one bit.

You can directly access single bits in integers (without some dirty hacks like shifting).

  • Byte addressable advantages:



4 Answers 4


The reason why the hardware isn't bit addressable is the cost and complexity to address to that level of granularity isn't justified. You need more wires the more accurately you address.

A lot of computers aren't really byte addressable either. They tend to move memory around in bigger chunks, 64 bytes is common.

Processors do allow you to read and write specific bytes for convenience. They translate to the actual addressing for you i.e. work out which block to move that contains the byte you are after.

The reason why bytes are chosen to be the convenient size is largely historic. It was a sensible compromise between the size of the word needed to address memory and the, possibly wasted, memory you get back. In the early days, the 8 fold difference in the amount of memory you could effectively address for a given size word was important. Today, with 64-bit systems, it's less so but there's no obvious benefit in causing the huge backwards incompatibility that a change would necessitate.

  • They tend to move memory around in bigger chunks - So the extraction of single bytes (done by bit shifting I guess?) is fast enough to make this approach worth?
    – Ford O.
    Jun 2, 2016 at 19:40
  • 1
    How many bits computers can move in a single chunk is irrelevant, if you can address individual bytes then your computer is byte-addressable. Oct 28, 2016 at 11:37

Here are some thoughts:

  • You can address 8 times less memory with same size of addresses
  • do you just want to address bit wise and still operate on 8,16,.. bits at once just at bit addressable positions?
  • do you wish assembly commands just working on single bits?
  • registers in the CPU and also the data buses between the components of the hardware have fixed size. If you want to use them with every possible number of bits, the number of possibilities grow a lot on contrast to byte wise usage.
  • How often do you use bit operations? Are the extra efforts to be able to use bit wise addressing and operations worth this?

I think most Data is very suitable to be stored in multibles of 8 bits. e.g. ASCII, little values in 8,16,32,64 bits. So you gain very few by adding bit wise addressing but you get a much more compicated CPU, momory handling, caching, ... .

  • ASCII is technically a 7-bit encoding scheme, so not really the best argument in favor of 8-bit-addressing. Nov 27, 2021 at 9:42
  • @Miguel Bartelsman: You are right ASCII is 7 bit, but I know of no system where it was not stored as 8 bits. One bit for parity-check or to extend the ASCII code for custom reasons.
    – MrSmith42
    Nov 30, 2021 at 8:04

There have been bit-addressable architectures; for example, the CDC Cyber 200 series systems. (48 bit addresses)

There was a reason for this, however. The aforementioned machine is a vector (SIMD) machine and bit vectors are very important for controlling vector operations as well as denoting "sparse vectors", where storage for an element need only be allocated when the element is nonzero. The Cyber 200 had a complete set of bit operation, merge and select, as well as operations to generate control bit vectors.

But vector machines are a very different breed from normal scalar machines, which can "make do" with byte or word granularity in addressing.


There have been bit-addressable computers, with variable-sized words (up to a limit), see (for example) patent US4467443.

However, the more assumptions you can make and the less flexibility you have, the faster you can make your RAM. If you know that you will only ever fetch bytes (or 16-bit words, or 32-bit words, or 16-byte memory lines), you can wire up all of this in parallel, but that is harder (although not impossible) to do with a more flexible design.

There's also been CPUs where the size of the word fetched decides the granularity of the addressing. So bytes can be at any byte-address, 16-bit words must be at an even address, and 32-bit words at an address that is a multiple of four.

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