In 8086, mapping of logical adderss to physical address is done with the help of segmentation. Segment registers : offset, and you get the physical location in a 2^20 byte RAM, even though you have 16 bit registers.

Now, my questions are:

  1. When logical address are genereted? (When program starts to run? before? are them like virtual address?)

  2. Who generates them? (CPU? Operating System?)

  3. Is segmentation mapping something logically smaller to something bigger? (216 logical address space to 220 physical address space)

  4. If this is so, what's the purpose? To me it seems the opposite of virtual addressing which maps a bigger virtual address space to a smaller physical ram.

1 Answer 1


The 8086 addressing scheme is not a virtual one.

It is a physical addressing scheme that takes into account the limitation of the registers to the 16 bits of the processor architecture, while offering a larger address bus.

A better approach would perhaps have been to have 20 bit address registers, or a 32 bit address bus (and combine 2 registers for making one address register). It was technically feasible, because Motorola 68000 processor family had this nicer approach). But , this would have made the 8086 much more expensive.

The compiler had to take into account the addressing scheme through the concept of memory model. For example:

  • the small memory mode assumed that all the data fits in 64K and all the code in another 64k, so that the code could load the segment registers once and keep them unchanged. Pointers were stored as a single 16 bit word.
  • at the opposite the large model assumed that code and data could use the full address Space, knowing then that segment registers had to be actively managed. Pointers were then stored with two 16 bit words (segment register+offset).

Between those extremes you had mixed models, in which either data or code was bound to a single segment of 64k.

From what I remember it was a painful scheme. Libraries had to be produced and shipped for each model. And lots of limitations: pointer arithmetic, array addressing, and memory allocation were bound to fit in 64k, even in large model.

So t summarise:

  1. the logical adresses are generated at run time (during the execution).
  2. the os loads the executable into memory, initialises the segment registers and hands over to the programme. From then, the programme has full responsibility.
  3. No, it is dividing something larger in smaller chunks so to cope with hardware limitations of the cpu
  4. Not relevant

Now if you want to understand this better, you'll have to look at the 8086 instruction set, and read about the memory models

  • 1
    It was a pain indeed. Ah the good old days. :) Feb 22, 2017 at 13:26
  • Yeah I think that is the problem. I've tried to push my basic knowledge into something pretty messy. Because I've read a lot about it but the actual process behind it's always quite messy and it's never completely explained. Anyway, for me it's still unclear. I know it's painful, but answering each question, one after the other woud be a lot calrifyng for me. That said, thank you very much for your answer! Feb 22, 2017 at 14:26
  • @GabrieleScarlatti i've tried to answer question by question now
    – Christophe
    Feb 22, 2017 at 14:55

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