I know that when the CPU is in user mode, it can't access all memory, it also can't execute some CPU instructions (called "privileged instructions" I believe).

But are these two restrictions the only things that the CPU cannot do when it is in user mode? For example, what about accessing the CPU registers, can the CPU access all of the CPU registers when it is in user mode?

  • Is there a particular CPU or architecture you are interested in? Mar 30, 2019 at 0:55
  • @1201ProgramAlarm Yes, x86 and x86_64. Mar 30, 2019 at 0:58
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    The Intel CPUs don't have a "user mode". They have several modes of operation. The common separation between user code and operating system code is handled using "privilege levels" and other restrictions controlled thru the segment registers and paging tables. Device drivers can reside somewhere in between. Consult the Intel documentation. Mar 30, 2019 at 1:19
  • @1201ProgramAlarm What do you mean there is no user mode in Intel CPUs, do you mean it is not formally called "user mode"? because based on what I have read, an x86 CPU for example have 4 protection rings, ring 0 is the most privileged (which we can call kernel mode), and ring 3 is the least privileged (which we can call user mode). Mar 30, 2019 at 10:52
  • There's nothing called "user mode" in the documentation. Applications would run at Protection Level 3. The CPU isn't in this mode. The protection level is part of the thread properties (CS and SS registers). Mar 30, 2019 at 12:51

1 Answer 1


There are certainly some registers that need to be protected from user-mode reading and/or writing.

There are several ways this might be done:

  • the registers that need to be protected can only be accessed by special instructions, and, in user-mode these instructions are privileged.

  • there are general instructions that can access both general registers and privileged registers, but may access the latter only in supervisor mode.

In either case, if virtualization is desired (guest hosting an OS or VM), then accesses to the privileged registers (both read and write), need to fault to the supervisor (allowing the supervisor to emulate their effect in some way), rather than silently doing nothing like returning zero on read or ignoring writes.

  • Who down votes this answer without a comment? Didn't sleep well? Mar 30, 2019 at 9:16

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