I have a simple question I think. A typical pc with ram has a 64bit databus between the cpu and ram. Let's say the ram starts at address 0, and I write i byte to address 0. Now my question is, would that byte be at the low end of the data bus(7:0) or would it be at the high end(63:56)? I simply want to know this because I'm curious, there isn't anything in particular I need this info for.

I hope someone knows.


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    Doesn't that depend on the CPU architecture's endianess? – πάντα ῥεῖ Jul 7 at 19:56
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    Typo, I think: it won't appear anywhere on address bus, it would be seen on the data bus. – Erik Eidt Jul 7 at 21:30
  • @ErikEidt Sorry, typo indeed. – appmaker1358 Jul 8 at 5:00

The answer depends on the endienness of the machine. You would have to look in the specification as to whether byte 0 is the lowest bits of a word or the highest bits of a word.

For the most part, it doesn't matter which data lanes are used, unless you plan to play music by modulating them. Where endinness really comes into play is when you write a series of bytes, and then ask the CPU to interpret them as a single word, or vice versa. That sort of thing happens all the time in programming... and we still aren't very good at it!

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  • Let's say it were little endian, since I believe most systems are that nowadays. Would that mean it would appear on (7:0)? – appmaker1358 Jul 8 at 5:01
  • @appmaker1358 Yes. That is where it world appear. – Cort Ammon Jul 8 at 5:47

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