If an I/O device is reading the main memory (directly) then is it possible for the CPU to access the cache?
I think it's possible for the CPU to access the cache in case of a hit. But in case of a miss there could be two scenarios.
- Either the CPU pauses the DMA and fetches blocks from the main memory (haven't heard of DMA being interrupted), Or,
- The CPU waits for the DMA to complete
Which is it?