Questions tagged [computer-architecture]

Computer architecture is the abstract description and specification of why, what, and how various hardware and software components are combined to create a computing device. This tag should be used with questions about the relationship between components making up a computer, what components are included or excluded in a computer, how components are connected, what data flows over the connections, and why components and connections are good choices.

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Is it viable to use imprecise analog computers to simulate equally artificial intelligence?

I was searching about simulation of artificial intelligence, machine learning and subjects alike and saw the news that some startups around of the world are using analog computers to simulate ...
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Double check of Book Erratum regarding Harvard Architecture and Von Neumann architecture

I was reading chapter 1 of the book Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C. (3rd Edition, June 2018) I think the figure 1-6 is incorrect. It says that "...
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Branch Prediction: How does a correlative branch predictor select from the global history?

I am trying to understand how branch prediction works, specifically with regards to correlative branch prediction. I understand that in an (m, n) branch predictor, there are m branch predictors, with ...
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How do i decide the compute sizing for a portal [closed]

I am designing the government portal that is gonna provide scholarship to various students under numerous schemes from GOI. In that way around 40 million users would be there to use the portal. how ...
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6 votes
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What are best practices for enterprise software, should a developer be able to login as one of its users? (when its your own company)

My company has its own proprietary software that I have both built and maintained over the last 5 years I am about to release a big change for all of my software to use OAuth2 instead of handling ...
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What are the differences between memory coherence and cache coherence?

https://en.wikipedia.org/wiki/Memory_coherence says: Memory coherence is an issue that affects the design of computer systems in which two or more processors or cores share a common area of memory.[1]...
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Do multiple software-threads on a single hardware-thread system execute sequentially?

I understand that if a system consists of multiple hardware-threads the scheduler assigns software-threads to hardware-threads. However, hypothetically, let's imagine a system that does only consist ...
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why aren't the instruction pointers saved in little endian?

I'm fairly new to architecture and I kinda get little endian wrong sometimes. So In this snippet I overflowed the sub-routine's stack frame just to affect the SAVED RBP and when I looked at the SAVED ...
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Is it possible to translate binaries from one instruction set to another?

I need to run software compiled for ARM on my x86 machine. Usually, to do that, you use an emulator like QEMU. I'd like to know why we can't just process the binary for one ISA and compile it to a ...
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How can I alter a system design to improve computational efficiency with AWS?

I have a use case which will take in data from the front end and transform it with various parameters. Then a random effects model is run on each transformation and multiple models are built For ...
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Computer Architecture : Out of order execution - Load/Store

In Out of Order execution , what happens if there is a younger store that executes before an older load. Wont the load get the wrong data provided the younger store writes to the same address? I ...
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38 votes
10 answers
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What's the difference between a variable and a memory location? [closed]

Recently I've been trying to explain pointers in a visual way, as flashcards. Question 001: This is the drawing of a location in computer memory. Is it true that its address is 0x23452? Why? ...
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Distributed System or not?

I am a software developer and I have developed a "software" with the following architecture: the front-end is developed in javascript using VueJs and NodeJS connecting to the back-end in python (...
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is it possible to increase the offset in a jm(jump command inside)?

This is my first post here and I'm glad to join this great community and I hope to learn a lot here and help if I can(though i am a very beginner). I have a theoretical question: I am trying to add ...
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7 votes
2 answers
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How did heavy software in the early days managed to run on 4MB RAM computer? [duplicate]

It's no secret that in the early days of computers, they had only 1-4MB of RAM. I found an article stating you needed only 4MB of RAM to run Word, Excel and PowerPoint simultaneously. How was that ...
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What tools exist to determine the speed up a GPU will have on an algorithm?

Basically, I am wondering what sort of speed I will get by parallelizing a algorithm to work with GPUs. I am wondering if someone has implemented queueing theory/Amdahl's law with a UI or if everyone ...
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How does the Base Address Registers (BARs) in a PCI card work?

I am trying to understand how the Base Address Registers (BARs) in a PCI card work, this is how I think they work: Each function in a PCI card have 6 BAR fields, and each BAR field is 32-bit in size. ...
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What does "data bus control" mean?

This video mentions the following: What does it mean for the DMA controller to be granted the data bus control, does that mean the CPU cannot use the bus to access memory and IO devices until the DMA ...
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Can the CPU manipulate the pins of an IO port directly?

Based on what I know so far, when you plug an IO device into an IO port (for example, when you plug a printer into a parallel port), the printer will be represented to the CPU as just another RAM chip....
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How data is accessed in Memory-Mapped I/O?

This is an example of Memory-Mapped I/O: So basically you access the device controller registers through memory. Now my question is, when you for example write to the memory location that maps to ...
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Can an IO device have some memory space or can it only have registers?

I am learning about IO devices, and so far I have only seen examples of IO devices that have registers and no memory space. For example, this is a printer that have three registers and no memory space:...
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Are "Control register" and "Status register" and "Data register" part of the device itself?

I am studying about Memory-Mapped I/O from here. I have read the following: From the CPU's perspective, an I/O device appears as a set of special-purpose registers, of three general types: ...
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The difference between accumulator-based and register-based CPU architecture?

I don't understand the difference between an accumulator-based CPU architecture and a register-based CPU architecture. I know x86 is register-based but it has an accumulator-like register. I only ever ...
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2 votes
2 answers
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Using actor model, how can one program concurrent portion (critical section) of code as self contained nuggets?

Von neumann architecture allows sequential processing of instructions. So, a single core within a CPU executes instructions sequentially. Consider, OS providing 1-1 threading model(here) in a multi-...
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How is the data path controlled between ALU and registers?

On some machines the operation of data path between ALU and registers is controlled by microprogram . On some machines , it is controlled by hardware .On machines with software control of the data ...
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1 vote
1 answer
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Should different data resource types have different data mappers?

In my application I have to consume data from an API, do some processing and then store the data retrieved from the API in my own database. Should I have multiple Data Mappers? One for the API and ...
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76 votes
7 answers
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Are stacks the only reasonable way to structure programs?

Most architectures I've seen rely on a call stack to save/restore context before function calls. It's such a common paradigm that push and pop operations are built-in to most processors. Are there ...
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4 votes
4 answers
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Byte addressable vs bit addressable

Why are most computers byte addressable instead of bit addressable? By B/b addressable I mean that processor can operate on level of single B/b. Bit addressable advantages: Booleans have size of ...
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Operation excution in terms of clock cycles

Typically for a single instrcution, 6 machine cycles are needed: FETCH instruction DECODE instruction EVALUATE ADDRESS fetch OPERANDS EXECUTE oepration STORE result My concern is regarding the fifth ...
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9 votes
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Computer Architectures NOT based on arrays [closed]

Wadler's original paper on Monads for Functional Programming ( Haskell ) ,he says Another question with a long history is whether it is desirable to base programs on array update. Since so much ...
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What was the first mechanical Turing-complete machine ever constructed?

We know that Charles Babbage designed the first Turing-complete mechanical machine - the Analytical Engine - in the 1800s, but it was never actually built (not yet anyway). In recent history, at ...
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Foundations of computation, and relation to modern computers [closed]

I want to understand how the theoretical foundations of computation relate to real-world computers. As far as my knowledge goes, Turing machines, recursive functions, finite state machines, lambda ...
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Floating Point representation -128+127 = -1 = 1111 1111

While reading Computer Architecture by Patterson (page 194) I got this question. IEEE 754 uses 127 as bias for single precision floating point so that it will be easy to compare floating point numbers ...
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1 vote
1 answer
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Relationship of common MCUs/CPUs to FPGA and ASIC

I'm trying to understand the relationship between "common" MCUs/CPUs such as Intel, AMD, PowerPC, AVR, ARM, etc. and FPGAs and ASICs. Here is my understanding: These commons MCUs/CPUs (again, Intel, ...
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Cache Memory Vs Main Memory [duplicate]

Why is the access time of the cache memory lesser than the access time of the main memory? I have tried looking at the sites as - tutorialspoint.com, education-portal.com etc. I know that the ...
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Ensuring reliability of cross-compilation

Provided that my code is fully standards compliant with no undefined behaviour, how can I best assure that it will be possible to cross-compile my software for any architecture? I had some ideas, but ...
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1 vote
1 answer
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Why are floats called "real numbers" in some languages?

Some programing languages, notably Pascal, have a type of numbers called "real". However, mathematically speaking, these types aren't real. For them to be "real", these types have to be able to ...
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10 votes
2 answers
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Are there alternatives to stack+heap+static memory model?

All programs I have seen organize their data memory into one or more call stacks (usually fixed size, but sometimes not), the heap, and static memory. Lately thread-local static storage has been ...
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Why isn't exponentiation hardware-implemented?

Why is there no exponentiation operation in hardware, even though many languages have builtin operators for it? Is it because even hardware implementations would need to use the same algorithm as ...
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18 votes
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How long is a typical modern microprocessor pipeline?

I learnt some about pipelining but those were 4-stage and 5-stage and I think that modern pipelining typical is much longer and more complicated in practice. How long are typical pipelines and how ...
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4 votes
2 answers
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Flat addressing vs. segmented addressing

Is flat addressing model generally superior to a segmented one? If so, why? If not, what instances would call for each over the other and why? My understanding of memory models surrounds the IA32/x86-...
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2 votes
1 answer
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Can we illustrate a CPU pipeline with a UML sequence diagram?

I study multicore pipelining and the diagrams are not UML sequence diagrams for instance Why not remake this diagram like an UML sequence diagram, would not that be more clear so that we can see ...
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7 votes
1 answer
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Hardware that accelerates pointer dereferencing?

Most modern languages make a heavy use of pointers / references: a typical OOP language uses VMT lookups, a typical functional language builds key data structures out of pointers, etc. Even typical C ...
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Is a CPU a computer?

I read that a computer is made up of the CPU and the memory. I also read that the CPU itself contains a cache which is memory. So if the CPU itself contains the memory, isn't the CPU a computer? ...
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2 votes
1 answer
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Why did Aiken decided to separate data and instructions in the Harvard Mark I?

When Aiken devised the Mark I, why did he decided to separate data and instructions? It was not mentioned in Wikipedia (or in any other searches I've looked) on how or why Aiken separated data and ...
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4 votes
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Is there genetic relationship between ARM and PDP-11 architectures?

Reading about ARM architecture I found many similarities to PDP-11 architecture which did not exist between ARM and x86. For example, General-purpose registers named Rx compared to AX, BX,... for x86 ...
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13 votes
9 answers
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How does understanding computer architecture help a programmer? [duplicate]

It is said, by Mike P. Wittie, in the course curriculum of computer architecture that, Students need to understand computer architecture in order to structure a program so that it runs more ...
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7 votes
1 answer
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How are operating systems compiled and booted the very first time?

I'm interested in how operating systems work. I've been reading some articles about Linux and seem to understand how it all generally comes together, but I feel like there's a chicken and egg dilemma ...
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2 answers
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How Do Computers Process Conditional/Input/ Event Based Code? [duplicate]

I understand that computers are basically a complex system of electrical signatures that can calculate based on logic boards, and some sort of gate mechanism, but how do computers process something ...
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7 votes
3 answers
636 views

Why isn't DSM for unstructured memory done today?

Edit: Comments suggested, that DSM just faded out by being not used recently. What were the reasons for this, what are DSMs drawbacks? Literature lists many positive aspects like easy to port ...
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