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Questions tagged [computer-architecture]

Computer architecture is the abstract description and specification of why, what, and how various hardware and software components are combined to create a computing device. This tag should be used with questions about the relationship between components making up a computer, what components are included or excluded in a computer, how components are connected, what data flows over the connections, and why components and connections are good choices.

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Distributed System or not?

I am a software developer and I have developed a "software" with the following architecture: the front-end is developed in javascript using VueJs and NodeJS connecting to the back-end in python (...
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Relationship of common MCUs/CPUs to FPGA and ASIC

I'm trying to understand the relationship between "common" MCUs/CPUs such as Intel, AMD, PowerPC, AVR, ARM, etc. and FPGAs and ASICs. Here is my understanding: These commons MCUs/CPUs (again, Intel, ...
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is it possible to increase the offset in a jm(jump command inside)?

This is my first post here and I'm glad to join this great community and I hope to learn a lot here and help if I can(though i am a very beginner). I have a theoretical question: I am trying to add ...
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How did heavy software in the early days managed to run on 4MB RAM computer? [duplicate]

It's no secret that in the early days of computers, they had only 1-4MB of RAM. I found an article stating you needed only 4MB of RAM to run Word, Excel and PowerPoint simultaneously. How was that ...
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1answer
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What tools exist to determine the speed up a GPU will have on an algorithm?

Basically, I am wondering what sort of speed I will get by parallelizing a algorithm to work with GPUs. I am wondering if someone has implemented queueing theory/Amdahl's law with a UI or if everyone ...
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How does understanding computer architecture help a programmer? [duplicate]

It is said, by Mike P. Wittie, in the course curriculum of computer architecture that, Students need to understand computer architecture in order to structure a program so that it runs more ...
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1answer
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How does the Base Address Registers (BARs) in a PCI card work?

I am trying to understand how the Base Address Registers (BARs) in a PCI card work, this is how I think they work: Each function in a PCI card have 6 BAR fields, and each BAR field is 32-bit in size. ...
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What does “data bus control” mean?

This video mentions the following: What does it mean for the DMA controller to be granted the data bus control, does that mean the CPU cannot use the bus to access memory and IO devices until the DMA ...
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4answers
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The difference between accumulator-based and register-based CPU architecture?

I don't understand the difference between an accumulator-based CPU architecture and a register-based CPU architecture. I know x86 is register-based but it has an accumulator-like register. I only ever ...
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3answers
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Can the CPU manipulate the pins of an IO port directly?

Based on what I know so far, when you plug an IO device into an IO port (for example, when you plug a printer into a parallel port), the printer will be represented to the CPU as just another RAM chip....
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Are “Control register” and “Status register” and “Data register” part of the device itself?

I am studying about Memory-Mapped I/O from here. I have read the following: From the CPU's perspective, an I/O device appears as a set of special-purpose registers, of three general types: ...
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How data is accessed in Memory-Mapped I/O?

This is an example of Memory-Mapped I/O: So basically you access the device controller registers through memory. Now my question is, when you for example write to the memory location that maps to ...
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1answer
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Can an IO device have some memory space or can it only have registers?

I am learning about IO devices, and so far I have only seen examples of IO devices that have registers and no memory space. For example, this is a printer that have three registers and no memory space:...
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2answers
467 views

Using actor model, how can one program concurrent portion (critical section) of code as self contained nuggets?

Von neumann architecture allows sequential processing of instructions. So, a single core within a CPU executes instructions sequentially. Consider, OS providing 1-1 threading model(here) in a multi-...
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How long is a typical modern microprocessor pipeline?

I learnt some about pipelining but those were 4-stage and 5-stage and I think that modern pipelining typical is much longer and more complicated in practice. How long are typical pipelines and how ...
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How is the data path controlled between ALU and registers?

On some machines the operation of data path between ALU and registers is controlled by microprogram . On some machines , it is controlled by hardware .On machines with software control of the data ...
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4answers
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Byte addressable vs bit addressable

Why are most computers byte addressable instead of bit addressable? By B/b addressable I mean that processor can operate on level of single B/b. Bit addressable advantages: Booleans have size of ...
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1answer
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Should different data resource types have different data mappers?

In my application I have to consume data from an API, do some processing and then store the data retrieved from the API in my own database. Should I have multiple Data Mappers? One for the API and ...
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Are stacks the only reasonable way to structure programs?

Most architectures I've seen rely on a call stack to save/restore context before function calls. It's such a common paradigm that push and pop operations are built-in to most processors. Are there ...
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3answers
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Operation excution in terms of clock cycles

Typically for a single instrcution, 6 machine cycles are needed: FETCH instruction DECODE instruction EVALUATE ADDRESS fetch OPERANDS EXECUTE oepration STORE result My concern is regarding the fifth ...
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1answer
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Computer Architectures NOT based on arrays [closed]

Wadler's original paper on Monads for Functional Programming ( Haskell ) ,he says Another question with a long history is whether it is desirable to base programs on array update. Since so much ...
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0answers
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What was the first mechanical Turing-complete machine ever constructed?

We know that Charles Babbage designed the first Turing-complete mechanical machine - the Analytical Engine - in the 1800s, but it was never actually built (not yet anyway). In recent history, at ...
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5answers
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How many bits' address is required for a computer with n bytes of memory?

How many bits of address is required (for the program counter for example) in a byte-addressed computer with 512 Mbyte RAM? What does the formula look like? How is this connected with the fact that ...
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1answer
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Foundations of computation, and relation to modern computers [closed]

I want to understand how the theoretical foundations of computation relate to real-world computers. As far as my knowledge goes, Turing machines, recursive functions, finite state machines, lambda ...
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4answers
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Has Little Endian won?

When teaching recently about the Big vs. Little Endian battle, a student asked whether it had been settled, and I realized I didn't know. Looking at the Wikipedia article, it seems that the most ...
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1answer
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Ensuring reliability of cross-compilation

Provided that my code is fully standards compliant with no undefined behaviour, how can I best assure that it will be possible to cross-compile my software for any architecture? I had some ideas, but ...
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407 views

Floating Point representation -128+127 = -1 = 1111 1111

While reading Computer Architecture by Patterson (page 194) I got this question. IEEE 754 uses 127 as bias for single precision floating point so that it will be easy to compare floating point numbers ...
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Instruction vs data cache usage

Say I've got a cache memory where instruction and data have different cache memories ("Harvard architecture"). Which cache, instruction or data, is used most often? I mean "most often" as in time, not ...
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Cache Memory Vs Main Memory [duplicate]

Why is the access time of the cache memory lesser than the access time of the main memory? I have tried looking at the sites as - tutorialspoint.com, education-portal.com etc. I know that the ...
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1answer
323 views

Why are floats called “real numbers” in some languages?

Some programing languages, notably Pascal, have a type of numbers called "real". However, mathematically speaking, these types aren't real. For them to be "real", these types have to be able to ...
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3answers
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Computers that operate exclusively on boolean algebra

I was wondering if there are any computers that operate exclusively on boolean operations. For example, no add, sub, mult, or div in the instruction set (although these could be emulated with the ...
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2answers
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Are there alternatives to stack+heap+static memory model?

All programs I have seen organize their data memory into one or more call stacks (usually fixed size, but sometimes not), the heap, and static memory. Lately thread-local static storage has been ...
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2answers
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Why isn't exponentiation hardware-implemented?

Why is there no exponentiation operation in hardware, even though many languages have builtin operators for it? Is it because even hardware implementations would need to use the same algorithm as ...
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Flat addressing vs. segmented addressing

Is flat addressing model generally superior to a segmented one? If so, why? If not, what instances would call for each over the other and why? My understanding of memory models surrounds the IA32/x86-...
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1answer
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Can we illustrate a CPU pipeline with a UML sequence diagram?

I study multicore pipelining and the diagrams are not UML sequence diagrams for instance Why not remake this diagram like an UML sequence diagram, would not that be more clear so that we can see ...
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Hardware that accelerates pointer dereferencing?

Most modern languages make a heavy use of pointers / references: a typical OOP language uses VMT lookups, a typical functional language builds key data structures out of pointers, etc. Even typical C ...
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1answer
274 views

Is a CPU a computer?

I read that a computer is made up of the CPU and the memory. I also read that the CPU itself contains a cache which is memory. So if the CPU itself contains the memory, isn't the CPU a computer? ...
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1answer
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Why did Aiken decided to separate data and instructions in the Harvard Mark I?

When Aiken devised the Mark I, why did he decided to separate data and instructions? It was not mentioned in Wikipedia (or in any other searches I've looked) on how or why Aiken separated data and ...
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1answer
460 views

Is there genetic relationship between ARM and PDP-11 architectures?

Reading about ARM architecture I found many similarities to PDP-11 architecture which did not exist between ARM and x86. For example, General-purpose registers named Rx compared to AX, BX,... for ...
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Why isn't DSM for unstructured memory done today?

Edit: Comments suggested, that DSM just faded out by being not used recently. What were the reasons for this, what are DSMs drawbacks? Literature lists many positive aspects like easy to port ...
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How are operating systems compiled and booted the very first time?

I'm interested in how operating systems work. I've been reading some articles about Linux and seem to understand how it all generally comes together, but I feel like there's a chicken and egg dilemma ...
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How Do Computers Process Conditional/Input/ Event Based Code? [duplicate]

I understand that computers are basically a complex system of electrical signatures that can calculate based on logic boards, and some sort of gate mechanism, but how do computers process something ...
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5answers
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How can I tell whether my computer is Harvard or von Neumann architecture?

I understand the difference between the two architectures is the separation of instructions from data in the Harvard architecture. But how do I know which type of system I'm on? Is it possible to ...
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1answer
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Is it possible to take a binary compiled for ARMv7 architecture and convert it to ARMv6?

Is it possible to take a binary compiled for ARMv7 architecture and convert it to ARMv6 ? Are there any tools that can do this?
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266 views

List structures in memory

Could anyone give an overview of how list structures which are composed of a head and a tail which references the rest of the list i.e linked list are represented in memory of the computer? Does the ...
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1answer
306 views

When to distinguish OS versions in canonical names for target platforms

I would like to organize my company's software releases by platform. I've looked at how Mozilla, Perforce, and Apache organize their releases, and it seems that I should partition by OS and processor ...
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2answers
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Why do computer architecture textbooks prefer MIPS architecture?

I have read a lot of computer architecture textbooks, and I wonder why most of them (if not all) used MIPS as the architecture to teach. Why MIPS and not Intel or AMD or something else? What makes the ...
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Learning computer architecture as a programmer [closed]

I typically run across gurus at SO and other places (instructors, book authors etc.) that would say something along the lines "This will cause alignment issues" or other low level tidbits. I want to ...
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Can increased usage of higher and higher programming languages lead to a deficit of programmers with computer architecture knowledge?

Quote from Wikipedia of the article "High-level programming language": A high-level programming language is a programming language with strong abstraction from the details of the computer. In ...