Questions tagged [x86]

The term x86 denotes a family of backward compatible instruction set architectures based on the Intel 8086 CPU. From Wikipedia: http://en.wikipedia.org/wiki/X86

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What is meant by /0 in AMD64 specification?

The AMD64 specification talks about /0 with regards to instruction encoding but I don't have a clue what is meant by that. For example, in Volume 3 the ADD instruction has three forms: ADD reg/mem16,...
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1answer
418 views

Registers and Stacks in NASM

So, I am more or less voluntarily learning NASM, and I have problems finding sources that really explain it. Unlike with Java or C# I can't just use google as well, since Assembly just isn't used by ...
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3answers
835 views

How to align on both word size and cache lines in x86

From what it sounds like, a 64 bit processor means aligning to 64 bits, which means if you have unicode utf-8 stored in there, each 8-bit chunk would take up 64 bits of space. That doesn't really make ...
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1answer
417 views

What tasks does a memory barrier enforces other than preventing the re-ordering of instructions?

I know that a memory barrier prevents the re-ordering of instruction from before to after and from after to before the memory barrier, for example if I have the following instructions: instruction 1 ...
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2answers
227 views

How does x86 deal with register pairs?

I’ve been reading about older processors (8080, 8086 and that) and i’ve seen that those older 8-bit processors had some 16-bit instructions through the use of register pairs. For example, on the 8080, ...
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2answers
1k views

How does a CPU load multiple bytes at once if memory is byte addressed?

I've been reading about CPUs and how they are implemented, and some big complex architectures (looking at you x86) have instructions that load from memory during one clock cycle. Since one address ...
6
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1answer
914 views

Why data alignment is used exactly?

Each data type must be aligned to a multiple of some number of bytes, for example a short int must be aligned to a multiple of 2 bytes, and an int must be aligned to a multiple of 4 bytes. But why ...
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1answer
202 views

Intel Memory Addressing Form

I'm am trying to understand machine code memory addressing for x86, and I've encountered two opposing general forms for addressing (using the ModRM and SIB bytes). Most unofficial resources I consult ...
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3answers
692 views

Make multithreaded program asynchronous

There is an application that processes TCP/IP requests according to some logic, and pretty always it connects to DB. Architecture is very common: one client -> one processing thread -> one DB ...
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4answers
8k views

The difference between accumulator-based and register-based CPU architecture?

I don't understand the difference between an accumulator-based CPU architecture and a register-based CPU architecture. I know x86 is register-based but it has an accumulator-like register. I only ever ...
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1answer
677 views

x86 lock instruction - simulator

I'm working on simple 8086 simulator. But I'm not sure how to implement lock prefix. I know this prefix used in semaphore implementations. 1) For now I have only 8086 core and no other cores like FPU....
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1answer
576 views

Testing a bootloader written from scratch?

I'm planning to write a simple bootloader. Nothing too complicated. Just really basic output and maybe keyboard input. But it seems a bit crazy to restart my computer every time I want to run the ...
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9answers
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I understand what a stack pointer is - but what is it used for?

The stack pointer points to the top of the stack, which stores data on what we call a "LIFO" basis. To steal someone else's analogy, it's like a stack of dishes in which you put and take dishes at the ...
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2answers
3k views

What's the REAL benefit of using CDECL? (more specifically pushing instead of reg-ing)

So, I'm learning assembly, and I've come to know the ABIs and i got some basics tests working using the cdecl calling convention to use the c's stdlib under nasm. But I've seen other Calling ...
4
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1answer
639 views

How do hybrid interpreter-JIT compilers work?

Chrome's V8 compiler, the Java HotSpot compiler, and many more have multiple tiers of interpretation and compilation. A function starts off as interpreted in HotSpot and then, if it is run often ...
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1answer
1k views

How to make absolute jumps relative?

Given I have x86 assembly code disassembled into a list of structures that fully describe it (opcode, regs, imm, etc.), how can I programmatically turn absolute jumps to relative jumps? Basically ...
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0answers
77 views

How can I find the start of a native method?

For a hobby project, I'm writing an x86 GC and JIT. For the GC, I need to maintain information about the stack layout (it's a precise GC), for which I need to be able to find out which method the IP ...
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2answers
463 views

Creation of an Assembler [closed]

I've always been interested in how programming languages are created, so for the past 8 months I've been researching, practicing and more about the creation of compilers. I've been able to quite ...
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3answers
2k views

How does Branch Target Prediction differ from Branch Prediction?

I do not understand how BTP differs from BP? Yes I understand BP evaluates whether a conditional is true/false, but surely implicitly this also determines the "target" instruction? If I predict the ...
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4answers
5k views

Is there much difference between X86 Assembly language on Windows and Linux?

I'm a complete beginner at Assembly, and my aim is to learn as much as I can to do with Assembly to one day I can reach expert level (I know I'm way off right now, but you never know). My only problem ...
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2answers
4k views

Flat addressing vs. segmented addressing

Is flat addressing model generally superior to a segmented one? If so, why? If not, what instances would call for each over the other and why? My understanding of memory models surrounds the IA32/x86-...
3
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3answers
4k views

Will an assembly language book for intel x86 processor be compatible with amd processors?

I'm wanting to get an assembly book to learn assembly, and was wandering if i get a book for intel x86 processor will there be any problems assembling the code on an amd processor?
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3answers
15k views

Why is multithreading often preferred for improving performance?

I have a question, it's about why programmers seems to love concurrency and multi-threaded programs in general. I'm considering 2 main approaches here: an async approach basically based on signals, ...
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3answers
2k views

What is a good way to learn about multicore programming at the kernel level in Linux? [closed]

I am interested in multicore programming at the kernel level. I expect this affects many areas and is probably different for each architecture. What are some must read sections of the kernel? If I ...
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2answers
8k views

What is the difference between Times and Dup in Assembly Language?

In a bootloader, the second last line is : TIMES 510-($-$$) db 0 Now, will this command also do the same : db 510-($-$$) DUP (0) If not why? I know what TIMES does, but its not mentioned in ...
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7answers
26k views

Purpose of NOP instruction and align statement in x86 assembly

It has been a year or so since I last took an assembly class. In that class, we were using MASM with the Irvine libraries to make it easier to program in. After we'd gone through most of the ...
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4answers
9k views

Why does ARM processors dominate Mobile platforms while x86 dominates Desktop/Server platforms

Almost all of the mobile phones, except the ones being produced by Intel, use ARM based processors while desktop/server industry is dominated x86 processors. What features does one provide over the ...
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2answers
687 views

x86 segmentation and threading

Is some connection between using x86 segmentation and a possible implementation a thread package? I've been told that usually x86 segmentation is implemented in operating systems these days with an ...
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2answers
296 views

Flexible development environments for creating a common code base targeting tablets (iPad/Android) and x86 PCs

Hopefully this won't be flagged for being too vague, but I'm really looking for suggestions from anyone with experience in this sort of situation. I work for a group that develops very specialized ...
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2answers
6k views

Assembly instructions execution time

Where can I find the x86 instructions execution time? How to find out which instruction is faster or smaller?
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3answers
13k views

What does the 'R' in x64 register names stand for?

I know the 32 bit registers were named like the 16 bit registers with an 'E' prefix to mean extended. I've always assumed that meant extended from 16 to 32 bits although I've never seen that ...
23
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5answers
20k views

Is there a canonical book on x86 assembly? [closed]

There are lots of books on assembly. However, they usually deal with ISAs about which I don't care, such as MIPS or ARM. I don't deal with these architectures; there's no reason for me to try to learn ...
41
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8answers
10k views

Why (not) segmentation?

I am studying operating systems and the x86 architecture, and while I was reading about segmentation and paging I naturally was curious how modern OSes handle memory management. From what I found ...
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3answers
2k views

What's so special about x64 and programming x86? [closed]

What is the difference between building a .NET project to target 32-bit or 64-bit? Are there computers that aren't able to run 32-bit programs and only 64-bit? Do x64 programs run twice as fast?
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3answers
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A list of the most important areas to examine when moving a project from x86 to x64? [closed]

I know to check for/use asserts and carefully examine any assembly components, but I didn't know if anyone out there has a fairly comprehensive or industry standard check-list of specific things at ...