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Jan 20, 2016 at 18:04 comment added Matthieu M. @Deduplicator: According to Introduction to the Mill CPU Programming Model there are different opcodes for signed addition and unsigned addition; I expect that both opcodes would support the 4 modes (and be able to operate on various bit-width and scalar/vectors). Then again, it's vapor hardware for now ;)
Jan 20, 2016 at 17:55 comment added Deduplicator Are the last three modes signed? (Doesn't matter for the first one, as it's 2-complement.)
Jan 20, 2016 at 15:57 history answered Matthieu M. CC BY-SA 3.0