How are physical memory addresses actually determined or 'created'. What is the process where the byte blocks have a memory address assigned to it?
I understand that this is determined during boot up, before the BIOS is executed. But not exactly sure how or what the process is.
I think the other answer has confused you slightly, and again for low level questions like this I suggest you learn one of the 80s microcomputer or modern microcontroller architectures.
saying that the memory addresses are assigned during manufacture of the RAM chips
This is basically wrong. The chips themselves do not know about absolute addresses from the programmer's point of view.
The key you need to understand is a "multiplexer". Imagine that you have an 8-bit computer with 8-bit addresses, wired to a single RAM chip. Inside the chip, a multiplexer decodes the 8-bit address to one of 256 values, effectively turning on one of 256 wires. That connects a particular group of eight cells in the chip to the data bus, enabling the processor to read or write them.
So far so good. Now you decide the architecture needs more RAM. So you expand the address bus to 12 bits. But each RAM chip only accepts 8 address bits. So you need another multiplexer: this time you take the top 4 bits and decode them to one of 16 possible values, and use that signal to decide which of the 16 RAM chips in the computer to communicate.
Which address maps to which hardware is determined by the address decode logic, the multiplexer in the middle.
It is usual for CPUs to start executing from a fixed memory address, often near the "top" of the address space. Maybe our 12-address-bit CPU starts from 0xF00, for example. In that case it's useful to arrange the hardware around the CPU so that 0xF00 is mapped to a ROM. This is the concept of a "memory map".
how would the computer know the addresses, does it make a massive request during boot up, or what's going on?
There's usually a mix of techniques. The processor will blindly start at some address, so it's the responsibility of the motherboard to provide some code at that address, such as a PC BIOS. That code will then probably go off and scan the memory - DIMMs have a small ROM chip on a separate serial bus that describes how big they are and what speed they support.
On the other hand, smaller systems may have an entirely fixed memory layout chosen by the designer.
PCI cards may also be mapped into the memory space by the BIOS at boot time. This enables the processor to find the video RAM (often on a separate card) and start up the display.
Reading from the other answers, I think one of misunderstandings you're operating under is that memory addresses are somehow globally unique, like IP addresses, MAC addresses, or phone numbers. That's not the case.
Fundamentally, a RAM chip just has the following things:
When enabled, the chip operates as described
When disabled, the data bus is set to a 'high impedance' state.
This is critical. It allows multiple chips to share the same data bus. Consider what would happen in this example: bit 0 of chip 0's databus might be low, while bit 0 of chip 1 is high (e.g. 5V). Since chip 0 and chip 1 share a databus, their two data bit 0 pins are connected together. If they have different values, such as the case here, you have 5V connected to 0V. This is a short circuit, and the magic smoke will appear.
Using the chip enable pins, you can have it so that disabled chips effectively "disconnect" themselves from the rest of the circuit. So long as only one of the chips is active at a time, then there is only one chip connected to the databus, and thus no shorts will happen.
You can imagine a 256 byte RAM chip. Addressing 256 values means that the address space of this chip ranges from 0b0000_0000 (0) to 0b1111_1111 (255). But what if you want to have a computer with 512 bytes of RAM, but there are no 512 byte chips in production?
Well, you can use two 256 RAM chips, together! Each one has 256 byte-sized memory cells, with their own 8 bit buses that accept values from 0 to 255. Now, notice that addressing 512 bytes would need a memory space ranging from 0b0_0000_0000 (0) to 0b1_1111_1111 (511). This needs a 9 bit address bus. But each of our chips only has an 8 bit address bus!
Here's the trick: your 9th bit (bit 8, counting from 0) of the address bus (coming from your CPU) will be connected to the chip enables of the two RAM chips.
In effect, bit 8 picks which of the two memory chips is addressed. The other 8 pins pick which cell within the active chip is being read/written.
0b0_0000_0000-0b0_1111_1111 of the CPU's address space0b1_0000_0000-0b1_1111_1111 of the CPU's address space.As you see, memory addresses are nothing more than a set of values on an address bus of each chip. They're not unique, but overlapping address bus values are possible by using chip enable pins to only ever select one of the chips.
You can imagine a scaled up version of this. You might have two memory chips, each with a capacity of 65,536 bytes (meaning they have at least a 16 bit address bus). You can use two bits of address bus to address one of 4 chips (00, 01, 10, 11, using a 2-to-4 de-multiplexer), and 16 bits of address space fed directly to the chip. You would end up with:
0b00_0000_0000_0000_0000-0b00_1111_1111_1111_1110b01_0000_0000_0000_0000-0b01_1111_1111_1111_1110b10_0000_0000_0000_0000-0b10_1111_1111_1111_1110b11_0000_0000_0000_0000-0b11_1111_1111_1111_111And just like that, now you have a computer with 256k of RAM, using only 65k RAM chips.
A memory unit is built from memory cells (storing one byte each) and a tree of logic gates which are basically small switches. An address is a set of bits which indicate to the switches which memory cell to read or update.
┌───[byte]
┌─[switch]
│ ┊ └───[byte]
CPU <--> [switch] ┊
┊ │ ┌───[byte]
┊ └─[switch]
┊ ┊ └───[byte]
┊ ┊
Address: bit0 bit1
Above is an illustration showing how one out of four memory cells connected by switches can be selected by two bits. So the two bits 00 you get the first byte, 01 you get the second byte and so forth.
You just need one additional switch any time you double the amount of memory, so with 3 bit you can address 8 bytes, 4 bits give you 16 bytes, and 16 bits give you 65,536 bytes.
So an address is just a set of bits which correspond to a chain of switches which gets us to a specific memory cell. A set of bits can also be interpreted as an integer number, and we call that number the address of the memory cells.
In other words, a memory cell does not really get the address assigned. Rather, the address follows logically from where the cell is located in the hierarchy of switches.
Of course this gets a lot more complicated on modern processors where there are multiple levels of caches, virtual memory mapping into physical memory and so forth. But fundamentally an address is just a set of bits corresponding to a set of switches which lets us select a specific memory cell.
x bits you can address 2^x cells.
A RAM element is an electric circuit with data and address input lines. The spec that it implements goes roughly like this:
If you select a specific pattern of address inputs in write mode, then the same pattern of data inputs will be produced as output on the data lines if you select the same pattern on the address inputs in read mode (as long as you keep delivering power to the element).
So the fact that a collection of bits (e.g. a byte) is stored in a specific part of the chip is encoded into the physical layout of the chip.
Now, viewed as an electric circuit, the RAM chip is basically a pattern repeater. What you do with this capability is a question for compilers and operating systems. Typically, a compiler will see a variable declaration and choose an address for that variable; for instance, it might know that the data segment starts at address 10000, we've already used 412 bytes for other variables, so everywhere this next variable is referenced, it'll insert the address 10412 (binary pattern 0010100010101100) into the generated machine code.
Obviously, OS and compiler construction is vastly more complicated than this, but the principles don't actually change very much in real life.
In short, it up to the memory controller to detect DRAM and create physical address map. The process is under the assist from BIOS code. The address map may be very complex by interleaving different channel and bank. you can read this material: https://web.eic.nctu.edu.tw/lpsoc/courses/MS2017Spring/supplemental/5.%20DRAM%20Memory%20Controller%20.pdf
from https://wiki.osdev.org/Detecting_Memory_(x86) :
"How does the BIOS detect RAM? I'll just do it that way." Unfortunately, the answer is disappointing: Most BIOSes can't use any RAM until they detect the type of RAM installed, then detect the size of each memory module, then configure the chipset to use the detected RAM. All of this depends on chipset specific methods, and is usually documented in the datasheets for the memory controller (northbridge). The RAM is unusable for running programs during this process. The BIOS initially is running from ROM, so it can play the necessary games with the RAM chips. But it is completely impossible to do this from inside any other program.
